There are various methods, as a semiconductor package technique in a semiconductor device. For example, surfaces of a semiconductor element except one surface are covered with a sealing material (mold resin) to form an element sealing material, and further, a redistribution layer is formed on the surface of the semiconductor element which is not covered with the sealing material. Among semiconductor package techniques, a semiconductor package technique called Fan-Out has been the mainstream.
According to the Fan-Out type, a semiconductor element (semiconductor chip) is covered with a sealing material to be a larger region than the chip size, the element sealing body is thereby formed, and further, a redistribution layer is formed to extend to the semiconductor chip and the region of the sealing material. Since the redistribution layer is thin and it is possible to use up to the region of the sealing material as the formation region of the redistribution layer, it is possible to increase the number of external connection terminals.
For example, as conventional techniques, there are known photosensitive resin compositions capable of being used in an interlayer insulation film and the like (Patent Document 1).